Currently with respect to different IC devices and application requests, the package configurations for packaging IC devices direct to Flip Chip Package, CSP (Chip Scale Package), WLCSP (Wafer Level Chip Scale Package) and DCA (Direct Chip Attach). Utilizing packaging techniques mentioned above, a plurality of semiconductor devices with same or different electrical functions can be packaged together to form a MCM (Multi-Chip Module), MPM (Multi-Package Module) or MCP ((Multi-Chip Package) to achieve larger capacity or better electrical functions.
However, the dimensions of semiconductor devices become smaller with higher pin counts, moreover, the terminal pitch of the semiconductor devices also becomes smaller. Substrates for carrying the semiconductor devices often suffer from bridging problem in interconnection with the semiconductor devices.
A conventional substrate for carrying semiconductor chips and sub-packages is disclosed in R.O.C. Taiwan Patent No. 466,719. Referring to FIG. 1, a semiconductor package 10 includes a substrate 11 having a planar upper surface for carrying a plurality of sub-packages 12 or chips. The substrate 11 has a plurality of contact pads 11a on the planar upper surface corresponding to a plurality of external terminals 12a of sub-packages 12. The external terminals 12a may be either bumps or solder balls. When one of sub-packages 12 having a high pin count or replaced by a flip chip with fine pitch bumps, the pad pitch of the contact pads 11a of the substrate 11 should be smaller. Normally a reflowing step is demanded to connect the external terminals 12a with the contact pads 11a, a bridging problem probably occurs between the contact pads 11a and the external terminals 12a by solder paste or flux coated on the contact pads 11a and eventually create shorts in the semiconductor package 10.